A76 L1 cache size?
"Each A76 has 128KB of L1 cache (64KB four-way instruction cache with four-cycle load-use latency, 64KB for data), 256 or 512KB of 1280-entry five-way L2 cache, and shares up to 4MB of L3."
I've often wondered why the L1 cache size on modern CPU's are so small. ARM3 back in 1989 had a 4K cache I'd have expected more than a 32 fold increase in nearly thirty years. Later CPU's now have two extra levels of cache and I understand a little bit about cache coherency. I'm sure there must be a good reason. Anyone know what it is?
How much slower is L2 and L3 I wonder?
Biting the hand that feeds IT
