So how exactly do they reinvent "cloud"? Sounds like another HW vendor
Cloud-stitching startup pitches NVMe FPGAs for SSDs
Fast NVMe over Fabric access to flash arrays needs direct access to the target drives, bypassing the X86 array controller, for the lowest latency. FPGAs are being developed to do this. Startup Attala Systems is working in this area, and says it has a new vision for reinventing private and public cloud infrastructure. It has …
COMMENTS
-
This post has been deleted by its author
-
Thursday 27th July 2017 06:29 GMT John Smith 19
Gosh, CISC processors too slow for low level HW access so design RISC processor in FPGA
What is it about modern HW designers?
"I can't do it without a fully Turing complete processor in the chip. I might get into problems I can't solve."
Handy hint. Most low level protocols can be handled through Finite State Machines. The issues are error handling (which should be infrequent enough you can escalate to a higher level of processing) and the number of states, but state compression tools and design approaches have existed for decades.
Not really seeing the benefits here that scream "I need this in my life, NOW."
-
Thursday 27th July 2017 10:37 GMT phuzz
Re: Gosh, CISC processors too slow for low level HW access so design RISC processor in FPGA
But if it's not Turing complete then how will the developers use {insert flavour of month language here}?
Plus the sort of people who can program a finite state machine probably don't use agile or devops or whatever buzzword is getting VC funding this week.
Basically they're just not cool.
-
-
Thursday 27th July 2017 17:36 GMT John Smith 19
"Plus the sort of people who can program a finite state machine probably "
That's the thing about FSM's.
You don't program them.You implement them. In hardware. That's where you get the speed from.
Of course you can implement an FSM interpreter that navigates through a state table.
Which is what YACC or Bison are.
Mine's the one with the old digital design text with the chapter on "Mealy-Moore" systems.